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MC14027B Dual J-K Flip-Flop
The MC14027B dual J-K flip-flop has independent J, K, Clock (C), Set (S) and Reset (R) inputs for each flip-flop. These devices may be used in control, register, or toggle functions.
Features
* * * * * * * *
Diode Protection on All Inputs Supply Voltage Range = 3.0 Vdc to 18 Vdc Logic Swing Independent of Fanout Logic Edge-Clocked Flip-Flop Design Logic State is Retained Indefinitely with Clock Level Either High or Low; Information is Transferred to the Output Only on the Positive-Going Edge of the Clock Pulse Capable of Driving Two Low-Power TTL Loads or One Low-Power Schottky TTL Load Over the Rated Temperature Range Pin-for-Pin Replacement for CD4027B Pb-Free Packages are Available*
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PDIP-16 P SUFFIX CASE 648
16 MC14027BCP AWLYYWWG 1
16 SOIC-16 D SUFFIX CASE 751B 1 14027BG AWLYWW
MAXIMUM RATINGS (Voltages Referenced to VSS)
Symbol VDD Vin, Vout Iin, Iout PD TA Tstg TL Parameter DC Supply Voltage Range Input or Output Voltage Range (DC or Transient) Input or Output Current (DC or Transient) per Pin Power Dissipation, per Package (Note 1) Ambient Temperature Range Storage Temperature Range Lead Temperature (8-Second Soldering) Value -0.5 to +18.0 -0.5 to VDD + 0.5 10 500 -55 to +125 -65 to +150 260 Unit V V mA
16 SOEIAJ-16 F SUFFIX CASE 966 1 MC14027B ALYWG
mW C C C
A WL, L YY, Y WW, W G
= Assembly Location = Wafer Lot = Year = Work Week = Pb-Free Indicator
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. 1. Temperature Derating: Plastic "P and D/DW" Packages: - 7.0 mW/_C From 65_C To 125_C This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high-impedance circuit. For proper operation, Vin and Vout should be constrained to the range VSS v (Vin or Vout) v VDD. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either VSS or VDD). Unused outputs must be left open.
ORDERING INFORMATION
See detailed ordering and shipping information in the package dimensions section on page 3 of this data sheet.
*For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
(c) Semiconductor Components Industries, LLC, 2005
1
August, 2005 - Rev. 6
Publication Order Number: MC14027B/D
MC14027B
TRUTH TABLE
Inputs C J 1 X 0 X 1 X X X X X X X K X 0 X 1 1 X X X X S 0 0 0 0 0 0 1 0 1
Outputs* R 0 0 0 0 0 0 0 1 1 Qn 0 1 0 1 Qo X X X X Qn+1 1 1 0 0 Qo Qn 1 0 1 Qn+1 0 0 1 1 Qo Qn 0 1 1 No Change
X = Don't Care = Level Change
= Present State * = Next State
PIN ASSIGNMENT
QA QA CA RA KA JA SA VSS 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 VDD QB QB CB RB KB JB SB
BLOCK DIAGRAM
7 6 3 5 4 9 10 13 11 12 VDD = PIN 16 VSS = PIN 8 J C K R Q 14 S Q 15 J C K R Q 2 S Q 1
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MC14027B
ORDERING INFORMATION
Device MC14027BCP MC14027BCPG MC14027BD MC14027BDG MC14027BDR2 MC14027BDR2G MC14027BFEL MC14027BFELG Package PDIP-16 PDIP-16 (Pb-Free) SOIC-16 SOIC-16 (Pb-Free) SOIC-16 SOIC-16 (Pb-Free) SOEIAJ-16 SOEIAJ-16 (Pb-Free) Shipping 500 Units / Rail 500 Units / Rail 48 Units / Rail 48 Units / Rail 2500 Units / Tape & Reel 2500 Units / Tape & Reel 2000 Units / Tape & Reel 2000 Units / Tape & Reel
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.
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II I II II I I I II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I II I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIII I I III II I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII III I I I I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II IIIIIIIIIIIIIIIIIII IIII I I I I IIII I II I I I I III II IIII I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII III IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII III II III I I I I I I I I I III I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II II IIII I I IIII I IIII I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIII III II IIII I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII III I I I I I I I I I III II IIII III I II II IIII I I IIII I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIII III II IIII I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII III II IIII I III II IIII III I I I I I I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I III I I I I I I I I I III II IIII III I II II IIII I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIII II IIII I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII III II IIII I II IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I II I IIII II IIII I III IIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II IIII I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII III I I I I I I I I I III II IIII I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIII I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I III I I I I I I I III II IIII I II II IIII I I II IIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII III I IIII IIIII I I II II II I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I II IIII I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II I II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII
ELECTRICAL CHARACTERISTICS (Voltages Referenced to VSS)
Total Supply Current (Notes 3 & 4) (Dynamic plus Quiescent, Per Package) (CL = 50 pF on all outputs, all buffers switching) Quiescent Current (Per Package) Input Capacitance (Vin = 0) Input Current Output Drive Current (VOH = 2.5 Vdc) (VOH = 4.6 Vdc) (VOH = 9.5 Vdc) (VOH = 13.5 Vdc) Input Voltage "0" Level (VO = 4.5 or 0.5 Vdc) (VO = 9.0 or 1.0 Vdc) (VO = 13.5 or 1.5 Vdc) Output Voltage Vin = VDD or 0 (VOL = 0.4 Vdc) (VOL = 0.5 Vdc) (VOL = 1.5 Vdc) (VO = 0.5 or 4.5 Vdc) "1" Level (VO = 1.0 or 9.0 Vdc) (VO = 1.5 or 13.5 Vdc) Vin = 0 or VDD Characteristic "1" Level "0" Level Source Sink Symbol VOH VOL IOH VIH IDD IOL Cin VIL Iin IT VDD Vdc 5.0 10 15 5.0 10 15 5.0 10 15 5.0 5.0 10 15 5.0 10 15 5.0 10 15 5.0 10 15 5.0 10 15 15 -- - 3.0 - 0.64 - 1.6 - 4.2 4.95 9.95 14.95 0.64 1.6 4.2 Min 3.5 7.0 11
2. Data labelled "Typ" is not to be used for design purposes but is intended as an indication of the IC's potential performance. 3. The formulas given are for the typical characteristics only at 25_C. 4. To calculate total supply current at loads other than 50 pF: IT(CL) = IT(50 pF) + (CL - 50) Vfk
where: IT is in mA (per package), CL in pF, V = (VDD - VSS) in volts, f in kHz is input frequency, and k = 0.002.
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MC14027B
-- -- --
--
--
-- -- --
-- -- --
- 55_C
4 0.1 0.05 0.05 0.05 Max 1.0 2.0 4.0 1.5 3.0 4.0 -- -- -- -- -- -- -- -- -- -- -- -- -- -- - 2.4 - 0.51 - 1.3 - 3.4 4.95 9.95 14.95 0.51 1.3 3.4 Min 3.5 7.0 11 IT = (0.8 mA/kHz) f + IDD IT = (1.6 mA/kHz) f + IDD IT = (2.4 mA/kHz) f + IDD -- -- -- -- -- -- -- -- -- -- -- 0.00001 Typ (Note 2) - 4.2 - 0.88 - 2.25 - 8.8 0.002 0.004 0.006 25_C 0.88 2.25 8.8 2.75 5.50 8.25 2.25 4.50 6.75 5.0 5.0 10 15 0 0 0 0.1 0.05 0.05 0.05 Max 1.0 2.0 4.0 7.5 1.5 3.0 4.0 -- -- -- -- -- -- -- -- -- -- -- -- -- - 1.7 - 0.36 - 0.9 - 2.4 4.95 9.95 14.95 0.36 0.9 2.4 Min 3.5 7.0 11 -- -- -- -- -- -- -- -- -- -- -- 125_C 1.0 0.05 0.05 0.05 Max 30 60 120 1.5 3.0 4.0 -- -- -- -- -- -- -- -- -- -- -- -- -- -- mAdc mAdc mAdc mAdc mAdc Unit Vdc Vdc Vdc Vdc pF
IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIII I I III IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIII I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIII I II IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIII I I IIIIIIIIIIIII IIIIIIIIIIIIIII II IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIII I II IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II I II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I III I III IIIIIIIIIIIIIIIIIII IIII I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I II I III I II I IIIII I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII III I I I I I IIIII I III IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II I I I I II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II IIIIIIIIIIIIIIIIIII II IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I IIII IIIII II I IIIII I IIIII I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII III I I I I I IIIII I III IIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIII I II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII III I III I I I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIII I II I IIIII I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIII I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIII I II IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIII I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIII I IIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIII I IIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIII I IIII I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I IIII IIIIIIIIIIIIIIIIIIIII II IIII IIII I I I IIIIIIIIIIIII I IIII IIIII I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII III I I I I I III I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIII I II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I III I III IIIIIIIIIIIIIIIIIII IIII I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II I III I II I IIIII I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIII I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIII I I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIII
5. The formulas given are for the typical characteristics only at 25_C. 6. Data labelled "Typ" is not to be used for design purposes but is intended as an indication of the IC's potential performance.
SWITCHING CHARACTERISTICS (Note 5) (CL = 50 pF, TA = 25_C)
Set and Reset Pulse Width
Removal Times
Clock Pulse Rise and Fall Time
Clock Pulse Frequency
Clock Pulse Width
Hold Times
Setup Times
Propagation Delay Times** Clock to Q, Q tPLH, tPHL = (1.7 ns/pF) CL + 90 ns tPLH, tPHL = (0.66 ns/pF) CL + 42 ns tPLH, tPHL = (0.5 ns/pF) CL + 25 ns
Output Rise and Fall Time tTLH, tTHL = (1.5 ns/pF) CL + 25 ns tTLH, tTHL = (0.75 ns/pF) CL + 12.5 ns tTLH, tTHL = (0.55 ns/pF) CL + 12.5 ns
Reset to Q, Q tPLH, tPHL = (1.7 ns/pF) CL + 265 ns tPLH, tPHL = (0.66 ns/pF) CL + 67 ns tPLH, tPHL = (0.5 ns/pF) CL + 50 ns
Set to Q, Q tPLH, tPHL = (1.7 ns/pF) CL + 90 ns tPLH, tPHL = (0.66 ns/pF) CL + 42 ns tPLH, tPHL = (0.5 ns/pF) CL + 25 ns
Reset
Set
Characteristic
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tTLH, tTHL tWH, tWL Symbol
MC14027B
tPLH, tPHL
tTLH, tTHL
trem
tWH
tsu
fcl
th
5 VDD 5.0 10 15 5.0 10 15 5.0 10 15 5.0 10 15 5.0 10 15 5.0 10 15 5.0 10 15 5.0 10 15 5.0 10 15 5.0 10 15 5 10 15 5 10 15 Min 250 100 70 330 110 75 140 50 35 140 50 35 50 25 20 90 45 35 -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- Typ (Note 6) - 30 - 15 - 10 165 55 38 350 100 75 175 75 50 175 75 50 100 50 40 3.0 9.0 13 10 5 3 70 25 17 70 25 17 -- -- -- 125 50 35 Max 450 200 150 350 150 100 350 150 100 200 100 80 15 5.0 4.0 1.5 4.5 6.5 -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- MHz Unit ns ns ns ns ns ns ns ms
MC14027B
20 ns J 90% 50% 10% 20 ns K tsu 20 ns C tWH tPLH Q tTLH 1 fcl 90% 50% 10% 90% 50% 10% 20 ns 20 ns VDD VSS VDD VSS 20 ns VDD VSS 20 ns 90% SET OR RESET tw CLOCK tPLH tPHL Q or Q 50% 20 ns 50% 10%
tsu
th
90% 50% 10% tWL tPHL
VDD trem VSS VDD VSS VOH VOL
VOH VOL
20 ns 90%
20 ns 10%
50% tw
tTHL
Inputs R and S low. For the measurement of tWH, I/fcl, and PD the Inputs J and K are kept high.
Figure 1. Dynamic Signal Waveforms (J, K, Clock, and Output)
Figure 2. Dynamic Signal Waveforms (Set, Reset, Clock, and Output)
LOGIC DIAGRAM (1/2 of Device Shown)
S Q C J C
C
K
C C C
C R
C Q
C C C
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MC14027B
PACKAGE DIMENSIONS
PDIP-16 P SUFFIX PLASTIC DIP PACKAGE CASE 648-08 ISSUE T
-A-
16 9 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL. 4. DIMENSION B DOES NOT INCLUDE MOLD FLASH. 5. ROUNDED CORNERS OPTIONAL.
B
1 8
F S
C
L
-T- H G D
16 PL
SEATING PLANE
K
J TA
M
M
0.25 (0.010)
M
DIM A B C D F G H J K L M S
INCHES MIN MAX 0.740 0.770 0.250 0.270 0.145 0.175 0.015 0.021 0.040 0.70 0.100 BSC 0.050 BSC 0.008 0.015 0.110 0.130 0.295 0.305 0_ 10 _ 0.020 0.040
MILLIMETERS MIN MAX 18.80 19.55 6.35 6.85 3.69 4.44 0.39 0.53 1.02 1.77 2.54 BSC 1.27 BSC 0.21 0.38 2.80 3.30 7.50 7.74 0_ 10 _ 0.51 1.01
SOIC-16 D SUFFIX PLASTIC SOIC PACKAGE CASE 751B-05 ISSUE J
-A-
16 9
-B-
1 8
P
8 PL
0.25 (0.010)
M
B
S
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. DIM A B C D F G J K M P R MILLIMETERS MIN MAX 9.80 10.00 3.80 4.00 1.35 1.75 0.35 0.49 0.40 1.25 1.27 BSC 0.19 0.25 0.10 0.25 0_ 7_ 5.80 6.20 0.25 0.50 INCHES MIN MAX 0.386 0.393 0.150 0.157 0.054 0.068 0.014 0.019 0.016 0.049 0.050 BSC 0.008 0.009 0.004 0.009 0_ 7_ 0.229 0.244 0.010 0.019
G F
K C -T-
SEATING PLANE
R
X 45 _
M D
16 PL M
J
0.25 (0.010)
TB
S
A
S
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MC14027B
PACKAGE DIMENSIONS
SOEIAJ-16 F SUFFIX PLASTIC EIAJ SOIC PACKAGE CASE 966-01 ISSUE O
16
9
LE Q1 E HE M_ L DETAIL P
1
8
Z D e A VIEW P
c
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS AND ARE MEASURED AT THE PARTING LINE. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 5. THE LEAD WIDTH DIMENSION (b) DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE LEAD WIDTH DIMENSION AT MAXIMUM MATERIAL CONDITION. DAMBAR CANNOT BE LOCATED ON THE LOWER RADIUS OR THE FOOT. MINIMUM SPACE BETWEEN PROTRUSIONS AND ADJACENT LEAD TO BE 0.46 ( 0.018). DIM A A1 b c D E e HE L LE M Q1 Z MILLIMETERS MIN MAX --- 2.05 0.05 0.20 0.35 0.50 0.18 0.27 9.90 10.50 5.10 5.45 1.27 BSC 7.40 8.20 0.50 0.85 1.10 1.50 10 _ 0_ 0.70 0.90 --- 0.78 INCHES MIN MAX --- 0.081 0.002 0.008 0.014 0.020 0.007 0.011 0.390 0.413 0.201 0.215 0.050 BSC 0.291 0.323 0.020 0.033 0.043 0.059 10 _ 0_ 0.028 0.035 --- 0.031
b 0.13 (0.005)
M
A1 0.10 (0.004)
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PUBLICATION ORDERING INFORMATION
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MC14027B/D

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